JumpStart ASIC Verification

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ASIC Verification & Design Course

An introductory course into the world of ASIC Design and Verification. JumpStart ASIC Verification Training comprises of all the critical elements that are required to understand the VLSI Industry, right from the basics of Digital Electronics to understanding and verifying a simple design block using the Hardware Description Language Verilog.

Course Objectives:

  • Enables a career jumpstart by developing deep knowledge on ASIC Verification
  • Increase competitiveness by gaining experience with Verification concepts and techniques
  • Introduce Digital Design concepts and Verilog constructs
  • Build Verification environment for simple design in Verilog

Why VeriFast Online ASIC Verification Training Course?

  • Our Training provides a perfect platform for young engineers to develop knowledge on ASIC Design and Verification
  • Verilog LRM provides all the constructs of Verilog their usage – but is too vast and can be tedious. Our Training presents guidelines on how to use the constructs given in the Verilog LRM with live Examples and hands-on Labs
  • Our Training is designed by Industry Professionals with 15+ years of Verification experience
  • Our Training is a learn-at-your-own-pace and on-your-own-time program providing maximum convenience
  • Compare our program with any other program available and you’ll find that VeriFast offers the most cost effective and in-depth solution available

ASIC Verification Training – Course Content:

  • Digital Design Fundamentals
    1. Basic Fundamentals (Number System, Boolean Algebra, Logic Gates, Logic Optimizations)
    2. Combinational Logic Design
    3. Sequential Logic Circuits & Finite State Machines
  • Verilog For Design
    1. Concept & Fundamentals
    2. Structural Modeling
    3. Behavioral Modeling
    4. Building Behavioral Models
  • Verilog For Verification
    1. Verilog Operators & Directives
    2. Verilog Testbench Constructs
    3. Built-in System Functions & Tasks
    4. File I/O Operations
    5. Randomization & Control Functions
  • Verification Architecture
    1. Verification Flow and Simulation Process
    2. Types of Testbench – Architecture and Applications
    3. Testbench Building Blocks
    4. Verification Architecture
  • Scripting & Automation
    1. Shell scripts & Linux commands
    2. Perl Scripts
    3. Makefile
  • Writing Testbench : Verilog (Hands-on Lab)
    1. Testbench Architecture
    2. Testbench Building blocks
    3. Step-by-step Guidelines
  • Final Project
    1. Build Verification IP for one or more the standard based interface like I2C, SPI, AHB and UART.

ASIC Verification Training – Assignments & Labs:

  • Design a simple circuit in Verilog
  • Verification Environment for a simple design
  • Writing automation scripts in Shell and Perl
  • Creating Makefile
  • Final Project

Prerequisites:

  • BE or ME in Electrical Engineering, Computer Engineering, VLSI or Equivalent
  • High Speed Internet Connection

EDA Tools:

  • QuestaSim Functional Verification tool from Mentor Graphics